How To: Set up Xilinx Vivado Precompiled Libraries in DSim Cloud

DSim Cloud comes with the Xilinx Vivado standard libraries, both Verilog and VHDL, precompiled. The following are the precompiled standard libraries:

• simprims_ver
• unifast
• unifast_ver
• unimacro
• unimacro_ver
• unisim
• unisims_ver
• xilinx_vip
• xpm

Procedure

To use the Vivado precompiled libraries in your DSim simulations, you need to map them as follows:

1. In a local workspace with an active remote workspace, modify and save the configuration file mdc_config.yml for the appropriate VHDL library. To see how to change your mdc_config.yml, see DSim Cloud Configuration.

2a. To map the Vivado libraries with the VHDL IEEE-1993 library, uncomment the entry for the Vivado package in your mdc_config.yml:

    - name: vivado  
      version: "2022.1"

2b. To map the Vivado libraries with the VHDL IEEE-2008 library, change the version field of the IEEE library to "08" and uncomment the entry for the Vivado package in your mdc_config.yml:

    - name: ieee  
      version: "08"
    - name: vivado  
      version: "2022.1"

3. For every Verilog library component required in your design, ensure to add it to your DSim command:

dsim -L <lib_ver>

For example:

mdc dsim -a '-F filelist.txt -L simprims_ver -L unisims_ver -L xpm +acc+b -waves waves.mxd'

Optional

To see what libraries are mapped in your work directory, enter:

mdc dlib -a 'ls'

To see the components inside a particular library, like mylib, enter:

mdc dlib -a 'ls -lib mylib'

Example

You can try out the above Procedure with a provided example design as follows:

1. Download example_vivado-main.zip.

2. Extract the contents of this file into a folder called example_vivado-main.

3. Open a terminal window and navigate to example_vivado-main:

cd example_vivado-main

4. Start a DSim Cloud Interactive workspace:

mdc initialize --local-only
mdc workspace start

5. Navigate to SystemVerilog/sim:

cd SystemVerilog/sim

6. Compile and run the simulation:

mdc dsim -a '-F filelist.txt -L unisims_ver +acc+b -waves waves.mxd'

To get a better understanding of how to use DSim Cloud for mixed language simulations, open readme.txt under the /sim folder of the appropriate language (SystemVerilog / VHDL / VHDL_SystemVerilog).

See also

• How To: Set up IEEE Standard Precompiled Libraries in DSim Cloud