Is there a way to inspect preprocessing output, such as text macro expansion, in DSim?
IIRC, early versions of DSim shipped with a stand-alone SystemVerilog preprocessor, but there doesn't seem to be such a thing in recent releases.
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Shaun Luongposted
8 months ago
Admin
Hi Gareth! Currently, we do not ship the preprocessor with releases of DSim. If enough people upvote your feature request, we may put it on our roadmap.
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Is there a way to inspect preprocessing output, such as text macro expansion, in DSim?
IIRC, early versions of DSim shipped with a stand-alone SystemVerilog preprocessor, but there doesn't seem to be such a thing in recent releases.
2 Votes
1 Comments
Shaun Luong posted 8 months ago Admin
Hi Gareth! Currently, we do not ship the preprocessor with releases of DSim. If enough people upvote your feature request, we may put it on our roadmap.
0 Votes